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Registers PCI CD/CDa Configurable DMA Interface User’s Guide

18 EDT, Inc. May 2007

Registers

The PCI CD/CDa has two memory spaces: the memory-mapped registers and the configuration

space. Expansion ROM and I/O space are not implemented. Applications can access the PCI

CD/CDa registers through the DMA library routines especially

edt_reg_read() and

edt_reg_write(), using the symbolic names listed under “Access” for each register.

Configuration Space

The configuration space is a 64-byte portion of memory required to configure the PCI Local Bus and

to handle errors. Its structure is specified by the PCI Local Bus specification.

The structure as

implemented for the PCI CD/CDa is as shown in Figure 5 and described below.

Figure 5. Configuration Space Addresses

Values for the status and command fields are shown in Tables 4 and 5. For complete descriptions of

the bits in the status and command fields, see the PCI Local Bus Specification, available from:

PCI Special Interest Groupwww.pcisig.com

Address Bits

31 16 15 0

0x00 Device ID (CD-20=11, CD-60=13, CDa=44) Vendor ID = 0x123D

0x04 Status (see below) Command (see below)

0x08 Class Code = 0x088000 Revision ID = 0

(will be updated)

0x0C BIST =

0x00

Header Type= 0x00 Latency Timer

(set by OS)

Cache Line Size

(set by OS)

0x10 DMA Base Address Register (set by OS)

0x14 UI Xilinx Memory-mapped I/O Base Address Register (set by OS)

not implemented

0x3C Max_Lat =

0x04

Min_Gnt =

0x04

Interrupt Pin = 0x01 Interrupt Line

(set by OS)

1 2 ... 17 18 19 20 21 22 23 24 25 26 27 ... 39 40

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