
PCI CD and PCI CDa
Document Number: 008-00965-06 EDT Public Revision: I December 2004
Template: edt.dot
Page 57
Arguments
edt_p
device handle returned from edt_open
target
desired output frequency in Hz
xtal
base frequency of the PCI CD board:
PCI CD use XTAL20
PCI CD use XTAL60
Verbose
a value of 1 prints a description to stdout, useful for debugging ; a value of 0
turns off verbose output
Return
The actual frequency, in Hertz, computed for the edt_pll structure.
edt_set_pll_clock
Description
Sets the phase-locked loop circuit to the parameters described in Figure and computed using
edt_find_vco_frequency, above. This routine enables the phase-locked loop by setting
the appropriate bits in the FUNCT register, and then calls edt_set_out_clock to set the
circuit as required.
Syntax
#include "edtinc.h"
void edt_set_pll_clock(EdtDev *edt_p, double xtal, edt_pll
*pll, int verbose);
Arguments
edt_p device handle returned from edt_open
xtal base frequency of PCI CD/CDa board:
PCI CD-20 use XTAL20
PCI CD-60 use XTAL60
pll the structure containing the values necessary to set the phase-locked loop circuit,
as described in Figure 1.
verbose a value of 1 prints a description to stdout, useful for debugging; a value of 0 turns
off verbose output
Return
None.
edt_set_out_clock
Description
Sets the phase-locked loop circuit to the parameters described in Figure 1 and computed using
edt_find_vco_frequency.
Syntax
#include "edtinc.h"
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